TEA Systems                    Corporate News                                     Publication: FabTech

TEA Systems Published Article

Home | Products | Applications | News | Education | Services | Publications | WhitePapers | Contact TEA | Company

   

 

"Tuned reticle enhancements optimized for process response"

Semiconductor FabTech Article

Vol. 33 Q1-2007

 

Download Reprint:  Reticle Moly Signature Replicated in BCD Uniformity

 

 

Full Reprint of "Tuned Reticle Enhancements"

 

 

Other Publications

 

 

Contact for Product demo

 

The design alternatives of any reticle enhancement feature are shown to have a measurable impact on the size and response stability of the process window

  • Process windows optimization means more than selecting focus and dose.

  • Every reticle feature enhancement can influence both the size and the stability of the process window response

  • What exposure conditions minimize the process impact of local MEEF sensitivity?

  • What are the exact pattern sensitivities of each feature as process conditions and the exposure environment changes?

  • Do simulations take into account all reticle and wafer process variation?

  • Going beyond process simulation response, how can I make the right decisions for reticle feature design performance tuned to my process?

Abstract

ITRS roadmap history details the growing complexity of device design and the latest device-manufacturer’s techniques for tuning their process for each new design generation. In spite of the current desire to incorporate techniques termed “Design for Manufacture” (DFM) into manufacturing, simulations and the design cycle do little more than optimize feature quality for ideal exposure conditions while testing for shorts, opens and overlay problems over process variations.

The manufacturing linkage method in the DFM simulation is performed by the adaptation of a technique unchanged in the last 30 years, the “Process Window analysis”. With this methodology recent successes seen in chip-design have not taken their share of the burden of technology advancement. The lack of adequate manufacturing awareness in the designs coupled with materials design problems for EUV technology recently redirected industry’s path into critical layer splitting termed “Double Patterning”

Design optimization by simulation focuses on feature layout optimization for resolution. Design solutions that take advantage of the full potential spectrum of mask-feature alternatives to increase functional process-space and simplify setup in manufacturing do not exist since there is no method of feedback. A mechanism is needed that can quantify design performance robustness, with mask-contributions, to variations in the user’s specific manufacturing process.

In this study, a Process Behavior Model methodology is presented for the analysis of feature profiles and films to derive the relative robustness of response to process variations for alternative OPC designs. Analysis is performed without regard to the specific mechanics of the design itself. The design alternatives of each OPC feature are shown to be strong contributors not only to resolution and depth-of-focus but also to the stability of final image response; that is the ability of the feature profile to remain at optimum under varying conditions of process exposure excursion.

A method of extracting the systematic component of each feature’s design-iteration is derived providing the ability to quantify the specific OPC response sensitivity to changes in the exposure and process films as well as drift introduced by the tools of the exposure set.

Keywords: Lithographic Friendly Design, Double Patterning, DFM, Bossung, ACLV, Process Behavioral Models, metrology, stability, matching, photomask, simulation, proximity, response

TEA Systems

TEA Systems offers products to model films, photomasks, wafers, feature profiles, process and lens data for characterization and setup of semiconductor design, simulators, tools and the process.

 

TEA Systems, a privately held corporation since 1988, specializes in advanced, intelligent modeling of the semiconductor process and toolset. Products from TEA allow the user to decouple process, tool and random perturbations for enhanced process setup & control.

TEA Systems products include:

Vector Raptor: Advanced overlay process control for Double Patterning and Feature Design tuning

Weir PSFM: Full-wafer/field/scan analysis tool for FOCUS derived from proprietary defocus sensitive features.

Weir PW:    Reticle/Full-wafer/field/scan analysis for any metrology with advanced process window capabilities for both wafer and photomask control.

Weir TR:     Time-based process analysis modeling. A tool to link and correlate profile, film and critical element control to thermal reactions such as PEB and ChillPlate

Weir DMA:   Macro Automation interface for Weir PSFM and Weir PW for external program calling, automated data gathering or one-button analysis of commonly used sequences. Includes data trending and web interface.

 

Copyright 2006 TEA Systems Corporation, All rights reserved. Legal

 

TEA Systems Corp. | Tel: +1 610 682 4146
65 Schlossburg St., Alburtis, PA USA

 

If you do not wish to receive email announcements from TEA Systems, simply reply
to this message, and in the body of the message type: Cancel